Qualcomm and Google have partnered to develop a RISC-V wearable solution for use with smart watches based on the Wear OS by Google.
The companies announced an expansion of their partnership to develop the tech based on RISC-V, a relatively new chip architecture based on an open standard in competition with rivals such as the Arm architecture.
RISC-V, a royalty-free open-standard instruction set architecture (ISA), allows companies to develop custom cores, fostering innovation and competition in the marketplace. Its openness, flexibility, and scalability benefit the entire value chain, from silicon vendors to OEMs, end devices, and consumers.
This collaboration aims to reduce time to market for original equipment manufacturers (OEMs) looking to launch smartwatches with advanced features such as custom cores, low power consumption, and higher performance. The companies will continue to invest in Snapdragon Wear platforms, solidifying Qualcomm’s position as the leading smartwatch silicon provider for the Wear OS ecosystem.
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Qualcomm’s take on RISC-V
Qualcomm senior vice president of product management Ziad Asghar explained in an interview with VentureBeat how the company is thinking about RISC-V technology.
“At a very high level, we’re at a very good inflection point when it comes to the RISC-V instruction set architecture (ISA) as it is becoming an option for multiple industries as something that multiple different vendors in the market can start to use,” Asghar said. “There’s huge amount of momentum behind it. People are seeing the great value RISC-V brings as an open instruction set. There are no license fees, there are no royalties or anything like that, especially if you develop it yourself.”
He noted the companies can pay fees to license RISC-V cores designed by other vendors, but they don’t have to pay for the architecture itself. There are multiple such vendors in the market that are making the ecosystem more vibrant.
Qualcomm is designing its own cores and so it isn’t incurring a royalty fee.
“If you’re the kind of company that has the ability to create your own cores, that just gives you a chance to be able to do exactly what you want to create just for your specific application, instead of having to make something else fit into what you’re trying to do,” he said. “You also have the ability to do custom instructions, which gives you a lot more flexibility.”
Qualcomm has been using RISC-V for a few years. As of last year, the company had shipped close to 650 million chips with RISC-V design to date, mostly in controllers for cameras or graphics. Qualcomm is both designing its own RISC-V cores and licensing them from others. It acquired Nuvia, a RISC-V startup, for $1.4 billion in 2021.
“It makes it much more viable,” said Asghar. “We have very key companies in the consortium.”
That’s similar to what I heard last week from Patrick Little, CEO of SiFive, and SiFive and RISC-V cofounder Krste Asanovic, as they talked about the growing momentum of RISC-V.
Of course, the big pie-in-the-sky dream is to commercialize RISC-V designs that can tackle high-end processing, like data center processors made by the biggest chip and computer hardware companies. That’s why Qualcomm’s support is getting interesting. Arm, by comparison, is a juggernaut.
When Arm went public in September, it noted its customers have shipped 250 billion chips to date, with 31 billion shipped last year. That puts Qualcomm’s support is interesting but still a small part of the market.
RISC-V International plans to hold another RISC-V Summit in San Jose, California, on November 7-8.
Qualcomm started using RISC-V for smaller chips dubbed microcontrollers around 2019. Now with the wearables project, Asghar said the benefits of RISC-V are coming into play. But there are areas where there could be more software support, such as with Android devices, Asghar said. He noted that combining the open standard of RISC-V with open-source software is an “elegant” solution.
“As you can see, Google is quite committed to working on that at this point in time,” he said.
Google’s view
“Qualcomm Technologies have been a pillar of the Wear OS ecosystem, providing high performance, low
power systems for many of our OEM partners,” said Bjorn Kilburn, general manager of Wear OS by Google, in a statement. “We are excited to extend our work with Qualcomm Technologies and bring a RISC-V wearable solution to market.”
Qualcomm sees the expansion into RISC-V and the evolution of their Snapdragon Wear platform as an opportunity to drive innovation and streamline new device launches.
“We are excited to leverage RISC-V and expand our Snapdragon Wear platform as a leading silicon
provider for Wear OS. Our Snapdragon Wear platform innovations will help the Wear OS ecosystem
rapidly evolve and streamline new device launches,” said Dino Bekis, vice president of wearables and mixed signal solutions at Qualcomm, in a statement. “Our Snapdragon Wear platform innovations will help the Wear OS ecosystem rapidly evolve and streamline new device launches.”
The companies said the recent launch of the RISC-V Software Ecosystem (RISE), in which both companies participated alongside other industry leaders, demonstrates their commitment to advancing the RISC-V architecture. Qualcomm has also announced investments in a new company to further develop RISC-V hardware.
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